1. Field of the Invention
This invention relates to assessing errors over a communication link and more particularly relates to real-time scalability port assessment of high-speed serial links.
2. Description of the Related Art
In today's business world, vast amounts of information are generated. This information is often vital to the success of a business and may be the business' most valued commodity. Information must be processed, stored, updated, and shared by the business' operational units. For example, a manufacturer must be able to share information with its sales offices, its support staff, its suppliers, its distributors, and various other entities. As a result, many businesses utilize an information storage system that may be centrally located and that everyone associated with the business can access. One such information system is an Enterprise Information System (EIS). A business may have several sub-entities or “clients” that access one or more EISs.
Business may utilize one processor to manage its information. More likely however, a business will have multiple processors linked together to increase performance and computing power. Many systems combine processors and data-storage units into a variety of configurations, including shared memory systems or distributed memory systems. A collection of processors may be arranged such that each processor may read memory attached to a different processor. This arrangement of processors is often called a cluster. Each processor may instead be connected directly to each memory unit attached to a processor in this multi-processor arrangement and can access data directly. Often four or more processors and their memory units are arranged in a shared memory configuration in a single box called node. Nodes can then be connected together.
No matter what the arrangement, processors, clusters, or nodes are most likely connected to each other by communication links that are usually cables plugged into various ports. The cables are often high-speed interconnection cables plugged into serial ports. As arrangements of processors and memory units become more complex, the probability of data transfer error over these communication links increases. Thus, the various ports or links connecting multiple processors or systems are often tested to assess error in data transfer and performance.
Communication link performance can be affected by a number of different factors, including voltage, board impedance, temperature, cable lengths, connectors, and the like. If a port or link goes completely bad, or the cable is disconnected, the connection may cease to work. However, there are instances when a cable may not be seated properly, or go partially bad and the connection is merely degraded, not dead.
Most systems test for errors by sending high volumes of data to the receiving node or port. That node or port in turn sends out acknowledgements that contain the high volume data to be checked via counters. Performance error can then be calculated. The problem with this and most other methods is that the test monopolizes the link which disables all other traffic across the link. This prevents the nodes or ports from being used or tested correctly.
From the foregoing discussion, it should be apparent that a need exists for an improved apparatus, system, and method that assesses error over a communication link. Beneficially, such an apparatus, system, and method will allow port error assessment to occur over a port that is being used without disabling the port. Such an apparatus, system, and method would also allow a port error assessment to occur while maintaining the features of a running system, such as high data rates and random data send capability while the test is active. Such an apparatus, system, and method are disclosed and claimed herein.